1. Field of the Invention
The present invention relates to memory systems and, more particularly, to memory systems including memory modules and associated address buffers.
2. Description of Related Art
Digital data processing systems generally comprise a central processing unit (CPU), a main memory and one or more input/output devices such as card readers, magnetic tape readers, magnetic disks and printers, which are interfaced to the CPU and main memory via input/output controllers (IOC). In typical data processing systems, the amount of main memory in the system can usually be varied from some minimal amount to some maximum amount with the user of the data processing system determining the amount of memory to be actually installed within each particular system. Additional quantities of main memory, usually packaged in incremental units, can be added to a system as they are needed. The amount of main installed into a computer system is usually a function of the size and number of computer programs to be executed, the amount of data to be processed, and the speed with which the data must be processed. Therefore, in a typical data processing system, the amount of main memory actually configured within a particular system is less than the maximum amount of memory which could be configured.
Typically, the main memory within a computer is composed of dynamic random-access memory (DRAM) chips. As their name suggests, DRAM chips offer the possibility of calling any data word stored in memory to the CPU independently of its multitudinous neighbors. This is assured because DRAM chips store individual bits of data in multiple rows and columns of cells which provide each data bit with its own unique address. Address buffers are used to receive signals from a memory controller which are indicative of the particular rows and columns of cells within the DRAM chips which are to be accessed by the CPU. The address buffers function as a means for transmitting address signals and actually apply to the memory chips the address signals which are necessary in order to store and retrieve data in the cells of the chips.
Around 1983, Wang Laboratories (Lowell, Mass.) announced development of a method of packaging DRAMs that significantly reduced cost and space requirements of computer memory. The product of development was a single in-line memory module or SIMM that integrated nine separate 64 K RAM chips into a 0.75.times.3-inch space. SIMMs which are essentially small printed circuit (PC) boards with arrays of memory chips contained in plastic leaded chip carriers surface mounted on one or both sides of the boards, have evolved so that they now typically hold either nine 1 M-bit DRAMs or nine 256K-bit DRAMs. SIMMs are generally installed in connector sockets to make them easily added to a system and avoid the difficulty and risks of soldering the SIMMs directly to a PC board.
It should be appreciated that in the computer arts efforts are made to keep the number of components to a minimum, but to use each component to the fullest extent possible in order to optimize the compactness and efficiency of each system. In computer memory packaging, each DRAM SIMM could have its own individually associated address buffer, however, a single address buffer has often been employed to drive two DRAM SIMMs. As computer systems frequently include more than one pair of DRAM SIMMs, it is common to have a multiple of pairs of DRAM SIMMs mounted in slots or sockets with each pair of SIMMs having a single address buffer associated with in
As discussed above, computer memories are generally configured with less than the maximum amount of memory possible being actually installed in the system. Such systems are most efficiently made by initially equipping them with a full complement of address buffers and SIMM sockets for mounting memory components but only installing the number of memory components which are initially needed in the system, as selected by the user. Thus, it is likely that less than all of the SIMM sockets of a new system will have memory components actually installed in them. Adding memory later as it is needed can be quickly and easily accomplished by simply putting a memory component, e.g., a SIMM, into an empty socket since the address buffer is already present in the system to access that newly added memory.
Notwithstanding the clear efficiencies and desirable attributes of designs such as those mentioned above, such designs have had a number of deficiencies and shortcomings. For example, in order to ensure that the address buffers are capable of immediately driving a memory module newly installed in a socket, those address buffers must be kept in a constantly enabled state. While constantly enabling the address buffers for all SIMM sockets guarantees their ability to drive address lines (i.e., column and row information going to DRAMs), if a SIMM is not installed, the address buffer still drives address lines. Unnecessary voltage output signals from address buffers are a source of both excess current draw and electrical noise within the system. Excess current draw is undesirable because system power consumption is increase and noise, in the form of electromagnetic interference (EM) caused by rapid switching of address buffer signals, is undesirable because it can produce data errors.
Other systems have addressed these problems by enabling address buffers by means of manually operated DIP (dual in-line package) switches or jumpers used to configure system memory. However, reliance upon a user to manually, and correctly, activate switches or install jumpers is not a reliable solution in a complex computer memory system.
Based on the foregoing, it should be appreciated that there are good reasons for keeping an address buffer associated with a memory module constantly enabled; however, shortcomings and deficiencies are associated with such a design. The preferred prior art solutions to these problems have proven to be inadequate.